Midterm Design Review Agenda -- 3DGPU
Daniel Wilhelm [04/05/05]

1. Update from Dr. Johnson meeting last week
   a. Emailed Mr. Bishop late last week regarding synthesizing fixed point.
   b. Update on fractional fixed point -- 24:8 decided upon, we'll ensure no overflow.
   c. Re: Allan for Matrix Mathematics synthesis

2. Line Rasterization Module
   a. Algorithm conversion into VHDL from pseudocode ... eg swapping implementation

2. 3D Projection Module
   a. Compilable VHDL code with test bench already created.

